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Is there a way to check status without checking bit 2 in SMI registers?

Latest Updated:09/28/2009


Is there any method to check link status without checking bit 2 (Link Status) in the SMI status registers (register #1)?


It is possible to detect the change of Link signal by the interruption. Please use following method.
1. Set "1" at bit 22 (ECIIP) in EtherC/E-DMAC Interruption Enable Register (EESIPR).
2. Set "1" at bit 2 (LCHNGIP) in EtherC Interruption Enable Register (ECSIPR).
3. Read EtherC Status Register (ECSR) and EtherC/E-DMAC Status Register (EESR) at EINT0 interruption. If the interruption reason shows the change of Link signal, read EtherC PHY status Register (PSR). It shows the Link status (Connect/Discoonect).
Note: Do not forget to clear ECSR flag.
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