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What is DMA(Direct Memory Access)?

Latest Updated:11/01/2005


What is DMA(Direct Memory Access)?


When data is transferred between an I/O device and memory in an application system using a microcontroller, the CPU specifies a transfer source address and a transfer destination address in sequence (1-byte units), if an ordinary access is made, and inputs and outputs data. This means that updating the address must be managed and that it takes a long time to transfer data by program processing. When a large amount of data must be processed, therefore, a long time is required. Consequently, the CPU cannot perform processing in time, especially when must process video data and audio data real-time or transfer data with a disk drive.
DMA is a technique to speed up data transfer without using the CPU. DMA is executed by a DMA controller that does not capture data but only drives the bus (when data is transferred between memories, however, it does capture data once because two addresses must be changed). The DMA controller accesses an I/O device by using a DMA enable signal as a selection signal, and therefore, does not output the address of the I/O.
Before DMA transfer, the CPU only sets an operation mode of the DMA controller. When data is to be transferred, a DMA request signal is input to the DMA controller from an external source, and the CPU is placed in a hold (stop) status through handshaking with the DMA controller, and the DMA controller executes data transfer.

Some DMA controllers has a mode to transfer data by using two cycles of reading and writing, and a mode to transfer data in one cycle by simultaneously reading and writing (such as the flyby transfer mode of the V850E/Mx Series).

If the DMA request signal is kept asserted after data has been transferred, the DMA controller continues data transfer until the number of transfer bytes set in advance (terminal count: TC) is reached or a stop signal (TC/END) is input. Actually, each time data has been transferred, TC is decremented (-1). When TC has reached 0, the next transfer is stopped. Some DMA controllers, however, have a function, such as an autoload mode, that does not stop transfer even when TC reaches 0. In the autoload mode, initial values of transfer memory address and TC can be automatically set and the data of the same memory area can be repeatedly transferred. This mode is therefore used for displaying image data.
DMA transfer differs in operation, depending on the mode, whether the bus is released to the CPU each time transfer has completed (whether the hold request is cleared). An example of bus cycles in each transfer mode is introduced below. The name of the mode, operation, and the mode supported may differ depending on the DMA controller.

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