Long-word instruction for CPU: does CS signal output "L"?

When two addresses located in the same CS area are output consecutively (upper word data and lower word data are written in consecutive cycles), a "L" CS signal is output. However, these accesses do not always happen consecutively in the order, lower word data and then upper word data.
In other cases, a program fetch cycle or a DMA cycle might be inserted between these accesses. In this situation, a "L" CS signal is not output.